The present invention relates to non-volatile random-access memory (NVRAM), and more specifically, to a lateral non-volatile storage cell.
Unlike volatile random-access memory such as a dynamic RAM (DRAM), an NVRAM storage cell retains the stored information when power is turned off. Each bit of data is written to a separate storage cell within an integrated circuit or chip, and an array of the storage cells makes up a memory device. The storage cells can be integrated on the same die or multi-chip module of an application-specific integrated circuit (ASIC) or microprocessor in an embedded configuration. Because power is not continually applied to an NVRAM storage cell, the duration of retention of the stored value without power applied is an important factor in the accuracy of the storage cell.